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Solid State Technology - semiconductors, chips, integrated circuits

Technology News

SEMI tips standards for FPDs, MEMS, chips
Jun 25 -- June 25, 2008 - SEMI has published four new technical standards targeting substrate and processes in LCD, MEMS, and semiconductor manufacturing, as part of its triannual standards update....
 
Report: Japan firms tout 2x efficient nonmercury UV source
Jun 19 -- June 19, 2008 - Researchers at Kobe U. and Yumex have prototyped a UV light source made without mercury and twice as efficient as existing mercury lamps, with a commercial product possibly ready in two years, according to the Nikkei Business Daily....
 
Toshiba: Modeling technique boosts 45nm gate density
Jun 19 -- June 19, 2008 - Toshiba says it has developed a new compact model for circuit design that improves gate density for 45nm CMOS technology by 2.6× that of 65nm process technology, better than the 2.0× expected with a node migration....
 
Taiwan firm touts nontoxic reclamation process for LCD panels, Si wafers
Jun 18 -- June 18, 2008 - Startup Ben Ten Technology claims to have developed a nontoxic cleaning technology with application in reclaim processes for LCD substrate glass and silicon wafers....
 
Fujitsu tips low-power 32nm CMOS, power gating for system LSIs
Jun 18 -- June 18, 2008 - At this week's VLSI Symposium in Hawaii, Fujitsu Labs and Fujitsu Microelectronics have tipped details on their development of lower-power CMOS technology logic LSIs that are "on par" with other 32nm metal gate technologies. They also say they have developed a circuit with <1μsec on/off switching to extend "off" times and reduce leakage current....
 
IMEC tips streamlined HK+MG steps, touts 32nm high-k, Ta gate improvements
Jun 17 -- June 17, 2008 - At this week's VLSI Symposium (July 17-20, Hawaii), IMEC says its researchers say they have improved performance in planar CMOS using hafnium-based high-k dielectrics and tantalum-based metal gates for the 32nm node, reduced inverter delay by 33% (15ps to 10ps) and simplified the HK+MG process from 15 steps to nine....
 
Unisem, Flip-Chip ink WLP licensing deal
Jun 17 -- June 16, 2008 - Unisem Berhad and subsidiary Unisem-Advantpack Technologies (UAT) have agreed to license FlipChip International's wafer bumping and wafer-level packaging technologies, in exchange for a stake in UAT. The deal is seen as expanding Unisem's technology offerings, while broadening FlipChip's customer reach....
 
Vitex touts flexible CIGS lifetime achievement
Jun 12 -- June 12, 2008 - Vitex Systems says it has achieved a "key breakthrough" in protecting flexible copper indium gallium selenide (CIGS) solar cells with its "Flexible Glass," achieving 1100 hrs of testing in high-temperature and humidity conditions with stable efficiency....
 
IMEC, Aixtron tout low-power GaN "milestone"
Jun 03 -- June 3, 2008 - European R&D consortium IMEC and Aixtron say they achieved a "milestone" of growing AlGaN/GaN heterostructures on 200mm silicon wafers, a step toward fabricating low-cost GaN power devices for high-efficiency/high-power systems beyond silicon limits....
 
Analysts: Good, bad news with IMFT's 34nm flash debut
May 29 -- May 29, 2008 - Intel and Micron's announcement that they have developed a 34nm NAND flash device could give the companies a better cost/profit profile vs. competitors, and/or help stretch an already painful oversupply situation well into the next year, according to a report from Objective Analysis. Meanwhile, Gartner notes that the two need to make some related capacity decisions soon if they want to leverage their short-lived technology lead on the competition....
 
ASMI: New ALD tool offers single-metal gate stack for 32nm HK+MG
May 19 -- May 19, 2008 - ASM International's US subsidiary, ASM America, says it has a new atomic layer deposition (ALD) process targeting 32nm-node chip manufacturing with lanthanum oxide (LaOx) and aluminum oxide (AlOx) high-k cap layers that enable high-k metal gate stacks using a single metal, instead of two different metals required previously for CMOS....
 
Fujitsu tips method for estimating soft errors due to "cosmic rays"
Apr 30 -- Apr. 30, 2008 - Fujitsu Labs says it has developed a technique to measure the rate of soft errors in advanced LSI chips -- said to be caused mainly by neutrons by cosmic rays -- in a particular location, quickly and with a high degree of precision....
 
NIST: NIL actually improves nanoporous layers
Apr 30 -- Apr. 30, 2008 - NIST says its work has helped resolve whether nanoimprint lithography (NIL) can accurately stamp delicate insulating structures without damage -- and in fact makes them better....
 
Spansion, IBM ink memory license pact
Apr 29 -- Apr. 29, 2008 - IBM and Spansion have signed a seven-year patent cross-licensing agreement that is expected to widen Spansion's reach into flash memory design and manufacturing, and support both companies' end-market interests in China....
 
 

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