Exclusive video from 2008 SPIE Advanced Lithography Conference

SST On The Scene investigates

It takes two at 32: Reducing the CoO of double-patterning and layout optimization

Solid State Technology magazine’s Senior Technical Editor Debra Vogler asks industry thought leaders--in DFM, lithography, maskmaking, and design--to comment on the impact of double exposure/double etch (DEDE) on layouts, design rules, overlay requirements, and metrology.

As these succinct video clips demonstrate (each is less than 5 minutes long), some of the interviewees see alternative ways to reduce the CoO of double-patterning. And others believe process assist features in first layer patterns will see wider use as DEDE gains ground at 32nm – with the attendant learning curve. Beyond 32nm, profitable scaling to 22nm may require new mask levels and new integration schemes.

Debra Vogler of Solid State Technology interviews Lars Liebmann, Distinguished Engineer, Design for Manufacturability at IBM, at the 2008 SPIE Advanced Lithography Conference.; 193nm lithography; 22nm; CMOS manufacturing; Extreme Ultraviolet (EUV); Lithography; SST on the Scene at SPIE; double patterning; high-index immersion lithography; meeting overlay tolerances; nanoimprint lithography (NIL); solid state technology; Debra Vogler of Solid State Technology interviews Benjamin Eynon, Associate Director of Lithography, and Samsung assignee to SEMATECH, at the 2008 SPIE Advanced Lithography Conference. ; 193nm lithography; 22nm; CMOS manufacturing; Extreme Ultraviolet (EUV); Lithography; SST on the Scene at SPIE; double patterning; high-index immersion lithography; meeting overlay tolerances; nanoimprint lithography (NIL); solid state technology; Debra Vogler of Solid State Technology interviews Mireille Maenhoudt, Litho Process Development Group Manager at IMEC, at the 2008 SPIE Advanced Lithography Conference.; 193nm lithography; 22nm; CMOS manufacturing; Extreme Ultraviolet (EUV); Lithography; SST on the Scene at SPIE; double patterning; high-index immersion lithography; meeting overlay tolerances; nanoimprint lithography (NIL); solid state technology; Debra Vogler of Solid State Technology interviews Franklin Kalk, CTO at Toppan Photomasks, at the 2008 SPIE Advanced Lithography Conference.; 193nm lithography; 22nm; CMOS manufacturing; Extreme Ultraviolet (EUV); Lithography; SST on the Scene at SPIE; double patterning; high-index immersion lithography; meeting overlay tolerances; nanoimprint lithography (NIL); solid state technology; Debra Vogler of Solid State Technology interviews John Sturtevant, RET Technology Support Manager at Mentor Graphics at the 2008 SPIE Advanced Lithography Conference.; 193nm lithography; 22nm; CMOS manufacturing; Extreme Ultraviolet (EUV); Lithography; SST on the Scene at SPIE; double patterning; high-index immersion lithography; meeting overlay tolerances; nanoimprint lithography (NIL); solid state technology; In this series of interviews, Debra asks industry thought leaders--in DFM, lithography, maskmaking, and design--to comment on the impact of double exposure/double etch (DEDE) on layouts, design rules, overlay requirements, and metrology. As these su; 193nm lithography; 22nm; CMOS manufacturing; Extreme Ultraviolet (EUV); Lithography; SST on the Scene at SPIE; double patterning; high-index immersion lithography; meeting overlay tolerances; nanoimprint lithography (NIL); solid state technology; Solid State Technology magazine Senior Technical Editor Debra Vogler asks industry thought leaders to comment on the impact of double exposure/double etch (DEDE) on layouts, design rules, overlay requirements, and metrology. http://link.brightcove.com/services/link/bcpid1417302057http://www.brightcove.com/channel.jsp?channel=1214147015